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State of NAND MTD driver at start of project

By Admin
Created 23 May 2005 - 11:50am

Current state of NAND MTD


The current NAND MTD supports basic read/write functions. The code is hard-wired to support the NAND devices on a SPIA board. The ECC code supports 256 byte sectors.


There are 3 files:

nand.c: nand support algorithms. Unfortunately there is no hardware abstraction (ie. the hardware is assumed to be the SPIA board). but this is relatively easy to add.

spia.c: this initialises the spia hardware to set up the addresses for the hardware access.

ecc.c: ECC for 256 byte pages.


What needs to be done at this level:


Overall flash system diagram




A diagrammatic representation of support for SmartMedia, NAND and NOR as well as both FAT16 and JFFS2 might look like the above.


The NAND flash sub-system uses common layers for:



Concerns with using JFFS2 on NAND


There are some reasons why JFFS and NAND might not work together that well.


Two particular concerns re booting



Thus booting a 128MB NAND-based JFFS2 is likely to look something like this:


These are probably unacceptable for the product being used. We therefore need to run something better than this.


Two approaches spring to mind:


What I'm working towards

Right now I'm investigating the idea of trying to do something more appropriate. My current avenue of exploration is to use a journaling approach as follows:


Each page id identifies where the page fits into the file. When a page is replaced (ie file data is overwritten) a new page with the same page id is written and the old one is wiped out. During garbage collection, the pages containing valid data are copied and the wiped out data is discarded.


The benefits of this approach are:


Down sides:


Still need to see if a new data structure is going to reduce the overhead of jffs2_raw_node_ref somewhat.




Source URL:
http://www.yaffs.net/state-nand-mtd-driver-start-project